1. Field of the Invention
The present invention pertains to the field of dielectrics and, more specifically, doped ABO.sub.3 perovskite-type dielectrics that are utilized in thin-film capacitors for integrated circuits and the like. More particularly, the invention involves materials and methods for fabricating dielectric compositions that are utilized in thin-film capacitors and integrated circuit components such as DRAMS. These materials are formed in liquid deposition processes using polyoxalkylated metal complexes having dopants in a stoichiometric balance corresponding to an average crystalline formula.
2. Statement of the Problem
As will be understood by those skilled in the art, most crystalline materials having an ABO.sub.3 formula are perovskite crystalline compounds. These structures ideally have a unit cell forming a simple cubic structure including A-type cations at the corners of a cube, a B-type cation at the centroid of the cube, and oxygen atoms entered at each facial plane of the cube; however, this idealized structure may vary considerably with temperature. Other forms of perovskite-type compounds can be classified, for example, as orthombic, pseudocubic, pseudotetragonal, rombohedral, and tetragonal. Perovskites are noted for exhibiting strong ferroelectric and dielectric behavior, though not all perovskites exhibit these behaviors.
The ABO.sub.3 structure may be composed of respective A and B elements having different valences. Even so, these A and B site elements typically remain coupled with a ternary oxide. Known A-B ternary oxides include A.sup.+1 B.sup.+5 materials (e.g., potassium niobate), A.sup.+2 B.sup.+4 materials (e.g., strontium titanate or barium titanate), A.sup.+3 B.sup.+3 a materials (e.g., gadolinium iron oxide), complex oxides of the type A.sup.+2 (B.sup.+3.sub..67 B.sup.+6.sub..3) (e.g., Sr(Cr.sub.0.67 Re.sub..33), complex oxides of the type A.sup.+2 (B.sup.+3.sub.0.5 B.sup.+5.sub.0.5), and numerous other complex oxides.
Materials such as barium strontium titanate ("BST") exhibit electrical properties that are often very different when measured from bulk ceramics, as compared to the thin-film materials (i.e., those less than about ten microns thick) that are used in integrated circuits. Bulk ceramics are typically sintered at temperatures reaching from 1400.degree. C. to 1500.degree. C., and this high temperature tends to produce a correspondingly high degree of defect-free crystallization. On the other hand, thin-films are generally not sintered above about 900.degree. C. to 1100.degree. C. due to the potential for breakdown of integrated circuit wiring, layer interdiffusion, and cracking. Thin-films are most often deposited by conventional sputtering techniques, e.g., radio frequency or DC magnetron sputtering. On a microscopic level, these techniques can provide clumped areas of massed materials having nonuniform thicknesses, stratified layers that are improperly mixed to non-homogeneic proportions that are incapable of forming proper average crystals according to the mixture of ingredients. Accordingly, those attempting to replicate bulk ceramic behavior in thin film electronic components have often been unable to duplicate these parameters, even if the electron transfer mechanism remains the same between the two thicknesses of materials.
Metal oxide films have been formed from sol-gels, i.e., a metal alkoxide solution which is partially hydrated to form a partial gel. The sol-gels are applied to a semiconductor substrate to form a film, and then decomposed to form a metal oxide. One such method comprises the application of a sol-gel to a substrate followed by heat treatment. The heat decomposes the sol-gel and drives off the organics to form the metal oxide. See for example, U.S. Pat. No. 5,028,455 issued to William D. Miller et al., the Joshi article cited above, and B. M. Melnick, et al., "Process Optimization and Characterization of Device Worthy Sol-Gel Based PZT for Ferroelectric Memories", in Ferroelectrics, Vol 109, pp. 1-23 (1990). Nevertheless, the addition of water to these solutions induces substantial viscosity increases, and the prepared solutions are sensitive to environmental water (e.g., atmospheric water) that may significantly shorten shelf life due to substantial gelling of the hydrated solution and even precipitation of metals from solution. These factors often make the sol-gel solutions poorly suited for use in the fabrication of thin-film electronic components.
In another method, what has been termed a "MOD" solution is applied to a substrate followed by heating which decomposes the MOD solution and drives off the organics to form the metal oxide. See "Synthesis of Metallo-organic Compounds for MOD Powers and Films", G. M. Vest and S. Singaram, Materials Research Society Symposium Proceedings, Vol. 60, 1986 pp. 35-42 and "Metalorganic Deposition (MOD): A Nonvacuum, Spin-on, Liquid-Based, Thin Film Method", J. V. Mantese, A. L. Micheli, A. H. Hamdi, and R. W. Vest, in MRS Bulletin, October 1989, pp. 48-53.
Metal oxide materials such as BST are important materials for making integrated circuit thin film capacitors having high dielectric constants. Such capacitors are useful in fabricating integrated circuit memories such as DRAMs. See for example, Kuniaki Koyama et al., "A Stacked Capacitor with (Ba.sub.x Sr.sub.1-x)TiO.sub.3 For 256M DRAM" in IDEM (International Electron Devices Meeting) Technical Digest, December 1991, pp. 32.1.1-32.1.4, and U.S. Pat. No. 5,122,923 issued to Shogo Matsubara et al. The capacitors used in a DRAM integrated circuit are the predominant element determining the size of each DRAM cell.
Capacitor size requirements presently constitute a limiting factor in further reductions of DRAM cell size. A reduction in DRAM cell size is essential to further significant increases in DRAM cell densities for use in an integrated circuit, but this size reduction advantage will require a further reduction in the size of the cell capacitor. Reduction of the capacitor size can be achieved by increasing the dielectric constant of the material used in the dielectric layer of the capacitor, in order to permit the use of a smaller surface area in a capacitor having the desired dielectric properties. Prior methods for increasing the dielectric constant of materials have met with failure because these methods also increased the leakage current and the corresponding conductive current density of the dielectric material at fixed bias voltages. Excessive leakage current or conductive current density renders the material unfit for capacitors in integrated circuits and, in particular, unfit for capacitors in DRAM cells. It remains a problem in the field to increase the dielectric constant of materials, even for high dielectric constant material, such as BST, without significantly increasing the leakage current.